stm32f1xx_ll_utils.h 8.4 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f1xx_ll_utils.h
  4. * @author MCD Application Team
  5. * @brief Header file of UTILS LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.
  11. *
  12. * This software is licensed under terms that can be found in the LICENSE file
  13. * in the root directory of this software component.
  14. * If no LICENSE file comes with this software, it is provided AS-IS.
  15. *
  16. ******************************************************************************
  17. @verbatim
  18. ==============================================================================
  19. ##### How to use this driver #####
  20. ==============================================================================
  21. [..]
  22. The LL UTILS driver contains a set of generic APIs that can be
  23. used by user:
  24. (+) Device electronic signature
  25. (+) Timing functions
  26. (+) PLL configuration functions
  27. @endverbatim
  28. ******************************************************************************
  29. */
  30. /* Define to prevent recursive inclusion -------------------------------------*/
  31. #ifndef __STM32F1xx_LL_UTILS_H
  32. #define __STM32F1xx_LL_UTILS_H
  33. #ifdef __cplusplus
  34. extern "C" {
  35. #endif
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "stm32f1xx.h"
  38. /** @addtogroup STM32F1xx_LL_Driver
  39. * @{
  40. */
  41. /** @defgroup UTILS_LL UTILS
  42. * @{
  43. */
  44. /* Private types -------------------------------------------------------------*/
  45. /* Private variables ---------------------------------------------------------*/
  46. /* Private constants ---------------------------------------------------------*/
  47. /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
  48. * @{
  49. */
  50. /* Max delay can be used in LL_mDelay */
  51. #define LL_MAX_DELAY 0xFFFFFFFFU
  52. /**
  53. * @brief Unique device ID register base address
  54. */
  55. #define UID_BASE_ADDRESS UID_BASE
  56. /**
  57. * @brief Flash size data register base address
  58. */
  59. #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
  60. /**
  61. * @}
  62. */
  63. /* Private macros ------------------------------------------------------------*/
  64. /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
  65. * @{
  66. */
  67. /**
  68. * @}
  69. */
  70. /* Exported types ------------------------------------------------------------*/
  71. /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
  72. * @{
  73. */
  74. /**
  75. * @brief UTILS PLL structure definition
  76. */
  77. typedef struct
  78. {
  79. uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock.
  80. This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
  81. This feature can be modified afterwards using unitary function
  82. @ref LL_RCC_PLL_ConfigDomain_SYS(). */
  83. uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source.
  84. This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
  85. This feature can be modified afterwards using unitary function
  86. @ref LL_RCC_PLL_ConfigDomain_SYS(). */
  87. } LL_UTILS_PLLInitTypeDef;
  88. /**
  89. * @brief UTILS System, AHB and APB buses clock configuration structure definition
  90. */
  91. typedef struct
  92. {
  93. uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
  94. This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
  95. This feature can be modified afterwards using unitary function
  96. @ref LL_RCC_SetAHBPrescaler(). */
  97. uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
  98. This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
  99. This feature can be modified afterwards using unitary function
  100. @ref LL_RCC_SetAPB1Prescaler(). */
  101. uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
  102. This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
  103. This feature can be modified afterwards using unitary function
  104. @ref LL_RCC_SetAPB2Prescaler(). */
  105. } LL_UTILS_ClkInitTypeDef;
  106. /**
  107. * @}
  108. */
  109. /* Exported constants --------------------------------------------------------*/
  110. /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
  111. * @{
  112. */
  113. /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
  114. * @{
  115. */
  116. #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
  117. #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
  118. /**
  119. * @}
  120. */
  121. /**
  122. * @}
  123. */
  124. /* Exported macro ------------------------------------------------------------*/
  125. /* Exported functions --------------------------------------------------------*/
  126. /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
  127. * @{
  128. */
  129. /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
  130. * @{
  131. */
  132. /**
  133. * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
  134. * @retval UID[31:0]
  135. */
  136. __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
  137. {
  138. return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
  139. }
  140. /**
  141. * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
  142. * @retval UID[63:32]
  143. */
  144. __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
  145. {
  146. return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
  147. }
  148. /**
  149. * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
  150. * @retval UID[95:64]
  151. */
  152. __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
  153. {
  154. return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
  155. }
  156. /**
  157. * @brief Get Flash memory size
  158. * @note This bitfield indicates the size of the device Flash memory expressed in
  159. * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
  160. * @retval FLASH_SIZE[15:0]: Flash memory size
  161. */
  162. __STATIC_INLINE uint32_t LL_GetFlashSize(void)
  163. {
  164. return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
  165. }
  166. /**
  167. * @}
  168. */
  169. /** @defgroup UTILS_LL_EF_DELAY DELAY
  170. * @{
  171. */
  172. /**
  173. * @brief This function configures the Cortex-M SysTick source of the time base.
  174. * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
  175. * @note When a RTOS is used, it is recommended to avoid changing the SysTick
  176. * configuration by calling this function, for a delay use rather osDelay RTOS service.
  177. * @param Ticks Number of ticks
  178. * @retval None
  179. */
  180. __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
  181. {
  182. /* Configure the SysTick to have interrupt in 1ms time base */
  183. SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
  184. SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
  185. SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
  186. SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
  187. }
  188. void LL_Init1msTick(uint32_t HCLKFrequency);
  189. void LL_mDelay(uint32_t Delay);
  190. /**
  191. * @}
  192. */
  193. /** @defgroup UTILS_EF_SYSTEM SYSTEM
  194. * @{
  195. */
  196. void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
  197. #if defined(FLASH_ACR_LATENCY)
  198. ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
  199. #endif /* FLASH_ACR_LATENCY */
  200. ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
  201. LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
  202. ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
  203. LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
  204. #if defined(RCC_PLL2_SUPPORT)
  205. ErrorStatus LL_PLL_ConfigSystemClock_PLL2(uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
  206. LL_UTILS_PLLInitTypeDef *UTILS_PLL2InitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
  207. #endif /* RCC_PLL2_SUPPORT */
  208. /**
  209. * @}
  210. */
  211. /**
  212. * @}
  213. */
  214. /**
  215. * @}
  216. */
  217. /**
  218. * @}
  219. */
  220. #ifdef __cplusplus
  221. }
  222. #endif
  223. #endif /* __STM32F1xx_LL_UTILS_H */